SK Hynix has completed Developing HBM4 memory and prepared it for the production of high -volume memory stacks, said the company on Friday. Piles of HBM4 from SK Hynix go beyond the specifications determined by Jede by 25% in terms of efficiency, although it turns out whether the manufacturers of the up-to-date generation AI as AMD, Broadcom or Nvidia-use this potential on their products 2026.
Piles of HBM4 SK Hynix memory are 2048-bit We/O, by double the width of the HBM interface for the first time since 2015, and the rate of data transfer by 10 g/s, which is 25% higher compared to the official Jedec standard (more on this topic). Piles of HBM4 memory in the company operate specially designed dram, which was built using the technology of a 1b-Nm proven process (5th generation 10nm class 10nm), which combines decent performance efficiency with node maturity (i.e. low density density and variability).
“The end of the development of HBM4 will be a new milestone for the industry,” said Joohwan Cho, head of HBM Development at SK Hynix, who developed. “By providing a product that meets the needs of customers in terms of efficiency, energy efficiency and reliability in a timely manner, the company will meet the time to sell and maintain a competitive position.”
Unfortunately, SK Hynix does not reveal either the number of layers of the dram of its HBM4 devices or their capacity, although we are probably talking about 12 Hi 36 GB devices that will be used for the Rubin Data Data Center Nvidia graphics processor, but we specify. The company also does not disclose whether its initial stacks of HBM4 operate 12FFC+ (class 12nm) or N5 (5nm class) Basic logic produced by TSMC.
Probably the most engaging part of the SK Hynix announcement is the fact that he decided to go beyond the specification of Jede and certify his HBM4 stacks for 10 GT/S data transfer speed compared to 8 GT/S by standard. The company is not alone in going beyond Jedec Spec from HBM4: Micron is currently trying HBM4 devices with a speed of data transfer of 9.2 g/s, while Rambus has HBM4 memory controller capable of 10 GT/S speed. While at some point actual chip programmers can be used, most programmers apparently want to have reserves for an additional mind, according to the insight divided by Rambus a few years ago.
SK Hynix says that he is ready for mass production of his HBM4 piles, although he does not reveal when he plans to start the production of HBM4.
“We reveal the establishment of the world’s first mass production of HBM4,” said Justin Kim, president and head of AI Infra in SK Hynix. “HBM4, a symbolic turning point, apart from the limitations of AI infrastructure, will be a basic product to overcome technological challenges. We will grow at the full pile of AI memory supplier, providing products of memory with the best quality and various performance required in the AI era in a timely manner.”
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