Chinese scientists discover method for 99% defect removal using DUV chip fabrication equipment, but it destroys EUV pattern fidelity – by analyzing photoresist clustering with cryo-ET at 105°C

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Lowering defect density and increasing efficiency are key challenges for chip manufacturers and designers, who exploit hundreds of methods for both tasks. This is because semiconductor manufacturing technologies involve thousands of steps, each of which can affect defect rates and performance. A recent discovery by scientists from Chinese universities has revealed how photo resist materials behave during development and how a post-exposure bake (PEB) step can reduce defect density by up to 99% in some cases, according to a paper published in the journal Nature. However, despite these bold claims, the study has questionable practical application.

Scientists from Peking University and Tsinghua University managed to visualize how photoresist molecules dissolve, migrate and entangle in the developer fluid during the pattern formation (development) stage. To this end, the team used cryogenic electron tomography (cryo-ET) to reconstruct the true three-dimensional structure of the photoresist polymers in their hydrated state at sub-5 nm resolution.

The study revealed that most of the photoresist molecules accumulate in clusters at the gas-liquid interface and are not evenly distributed in the solution, causing defects. The researchers say that a slight raise in the post-exposure bake (PEB) temperature – in their case from 95°C to 105°C – and maintaining a continuous developer layer prevented these clusters from forming, reducing the defect density on 300 mm diameter wafers by more than 99% using existing protective materials and DUV equipment.

  1. Shell: The board is spin-coated with a photoresist.
  2. Exposure: Ultraviolet (UV) or extreme ultraviolet (EUV) featherlight passes through the mask to selectively reveal areas of the mask.
  3. Post-Exposure Baking (PEB): The exposed protective layer is gently heated to activate acid-catalyzed chemical reactions that change solubility.
  4. Development: The plate is rinsed with a developer solution (in the case of DUV, often TMAH in water), which dissolves the exposed or unexposed parts of the mask, depending on the type of mask, creating a slender layer of liquid developer and creating patterns. This stage was the focus of the research.
  5. Rinse and desiccated: The remaining pattern is cleaned and dried for further processing.

Developmental research has shown that photoresist molecules form feeble, reversible entanglements that lead to microscopic clusters that turn out to be a hidden source of pattern defects observed on processed semiconductor wafers.

Hidden process

In immersion lithography and EUV, a liquid developer layer dissolves the light-exposed areas of the mask, transferring the pattern to the wafer. Although this process is well known in the industry, until now there was no clear understanding of the microscopic behavior of chemically enhanced resist (CAR) materials during pattern development because existing methods such as scanning electron microscopy (SEM) could only observe dried residues or indirect effects. As a result, process engineers typically rely on trial-and-error tuning of the protective coating chemistry and developer composition because no one has observed the photoresist behavior in real time during development.

Instead of using SEM or atomic force microscopy, the researchers used a cryo-electron tomography tool – typically used in structural biology to study cells, protein complexes or viruses in a frozen state – to visualize the behavior of photoresists inside the developing liquid at nanometer resolution. To do this, they had to put a lot of effort into sample preparation, vitrification rate (the cooling rate at which a liquid changes state without crystallizing), and electron beam control.

For their study, the researchers used a poly(methacrylate)-based CAR, which is commonly used in 193 nm immersion lithography and 13.5 nm EUV lithography.

Observation

Cryo-ET imaging revealed that CAR polymers – frozen in their natural liquid state – were preserved as malleable, thread-like chains with randomly coiled shapes. Analysis of the polymer density showed that the concentration decreases rapidly with depth: in layers with a thickness of 25 nm to 100 nm, about 80% of the polymer mass accumulates near the gas-liquid interface. Therefore, contrary to long-time assumptions, resistive polymers were not evenly dispersed in the developer, but concentrated on the surface of the film, where they later formed clusters causing pattern defects. The same pattern has been observed and demonstrated with other resistors (e.g. those designed for 248nm and 365nm exposure), but until recently this was not a problem. Developer-only control samples showed no surface signal, confirming that the effect comes from the polymers themselves.

Further 3D reconstructions (combining hundreds of low-dose electron images taken at different tilt angles) showed that inside the film, the 12-nm polymer chains remained mostly separate, while near the surface they clustered into 30-40 nm clusters, with dimensions that far exceed the size of the killer defects in today’s technologies.

However, these clusters are heat reversible and are not observed in real life. In fact, the lethal defects in state-of-the-art nodes are orders of magnitude smaller, which means that CAR molecule clusters have already been mitigated by leading chipmakers in their state-of-the-art nodes.

Moreover, while increasing the post-exposure bake (PEB) temperature from 95°C to 105°C disrupts cohesive interactions and helps get rid of some defects in some manufacturing technologies, it is an absolute efficiency killer in state-of-the-art EUV lithography-based manufacturing processes.

Good for DUV, disastrous for EUV

In deep ultraviolet (DUV, 193 nm) lithography, PEB at approximately 105°C is within the normal operating range for poly(methacrylate)-based CARs. These resistors form features with a width of approximately 20 nm–40 nm, and their photoacid diffusion lengths (approximately 10 nm–20 nm) remain diminutive enough relative to these features to maintain resolution. At 105°C, the additional thermal energy slightly increases polymer mobility and acid diffusion, allowing for a more complete chemical reaction and smoother dissolution during development, which helps reduce residue and improve pattern uniformity, thereby reducing defects and maintaining efficiency. However, in some cases, PEB at temperatures around 105°C increases the line edge roughness (LER) and line width roughness (LWR), which leads to a degradation of the critical dimension uniformity (CDU), which means that it should not be used for critical layers.

However, in EUV lithography (13.5 nm) the situation is completely different. EUV resistors are typically baked at 80–95°C to precisely balance acid mobility and reaction completion while maintaining control over the critical dimension. EUV CARs must define features as diminutive as 13 nm, so even a few nanometers of acid spread can destroy the fidelity of the pattern. Raising the PEB temperature to 105°C would significantly accelerate acid diffusion, expand the reaction zone, and significantly raise the LER/LWR, thereby obliterating the fine features defined by EUV exposure and potentially creating defects. It also increases stochastic variability by uneven reaction of the CAR polymer chains, which leads to other defects.

Fall

While the study offers valuable microscopic insight into the behavior of photoresist polymers in developer films, its practical impact on semiconductor production is, to put it mildly, constrained. Increasing PEB to 105°C is already within the normal secure range for DUV lithography and is therefore not a breakthrough, which is why we do not see 30-40nm defects in state-of-the-art DUV-based nodes. Meanwhile, the same temperature control is inappropriate for EUV processes because such temperatures can seriously degrade resolution and efficiency.

As a result, the work is impressive from a scientific perspective because it confirms mechanisms that chipmakers have long tackled empirically. However, it does not offer any fresh solutions applicable to advanced nodes. On the other hand, if scientists from Intel, Samsung or TSMC also exploit Cryo-ET technology, they may come up with something that will lead to a real breakthrough.

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