The Ultra Ethernet Consortium (UEC) has delayed the release of version 1.0 of the specification from Q3 2024 to Q1 2025, but it appears that AMD is ready to announce it real network interface card for AI data centers, ready for deployment in Ultra Ethernet data centers. The up-to-date unit is the AMD Pensando Pollara 400, which delivers up to six times performance improvement for AI workloads.
The AMD Pensando Pollara 400 is a 400 GbE Ultra Ethernet card based on a processor designed by the company’s Pensando unit. The network processor includes a processor with a programmable hardware pipeline, programmable RDMA transport, programmable congestion control, and communications library acceleration. The NIC will go on trial in the fourth quarter and will be commercially available in the first half of 2025, immediately after the Ultra Ethernet Consortium formally publishes the UEC 1.0 specification.
The AMD Pensando Pollara 400 AI network card is designed to optimize AI and HPC networks with several advanced features. One of its key features is knowledgeable multipathing, which dynamically distributes data packets along optimal routes, preventing network congestion and improving overall performance. The NIC also includes path-aware congestion control, which redirects data away from temporarily congested paths to ensure continuous and rapid data flow.
Additionally, Pollara 400 offers rapid failover, rapid detection and bypass of network failures to maintain uninterrupted communication between GPUs, ensuring solid performance while maximizing the operate of AI clusters and minimizing latency. These features promise to escalate the scalability and reliability of AI infrastructure, making it suitable for large-scale deployments.
The Ultra Ethernet Consortium now has 97 members, up from 55 in March 2024. The UEC 1.0 specification aims to scale ubiquitous Ethernet technology in terms of performance and features for AI and HPC workloads. The up-to-date specification will operate the original technology as much as possible to maintain cost effectiveness and interoperability. The specification will include various AI and HPC profiles; although these workloads have much in common, they are significantly different, so to maximize performance there will be separate protocols.
